Modern integrated circuits use multiple levels of interconnect to connect individual devices together. Common types of interconnects include aluminum (Al) alloy interconnect lines and copper (Cu) interconnect lines. Upper layers of interconnect are coupled to additional layers of interconnect above and below through vias. In order to reduce interconnect resistance as the interconnect leads are scaled to smaller and smaller dimensions, the semiconductor industry is moving away from blanket deposition and etch of Al-based metallization and towards damascene interconnect structures with Cu-based metallization.
A major reliability concern in today's integrated circuits is failure of metallic interconnects due to electromigration. Studies have shown that via plugs are places of atomic flux divergence, making them a primary electromigration reliability concern. Electromigration imposes limits on the maximum allowed current through inter connects. Electromigration is electric current-induced metal self-diffusion. In places where atoms are depleting a more tensile stress develops, while in places where atoms are accumulating a more compressive stress develops. If tensile stresses become sufficiently large, voids form. Additional metal void growth under continued electromigration during normal circuit operation may lead to interconnect failure. Similarly, if compressive stresses become sufficiently large, metallic extrusions may form which may result in the shorting of one interconnect lead to an adjacent interconnect lead.
One common design for manufacturing (DFM) method to improve via electromigration reliability in multilevel interconnect is to add redundant vias where there is room. In circuits known to carry large currents, redundant vias may be required by design rules. Instead of making electrical connection with one via between a lower and upper level of interconnect two or more redundant vias may be used to reduce the current through any one via.